Sang Eun Leea,
Mohammed Kamal Warshiab and
Hee Jung Park*ab
aDepartment of Materials Science and Engineering, Dankook University, Dandae-ro 119 Dongnam-gu, Cheonan 31116, Korea. E-mail: parkjang@dankook.ac.kr
bHydrogen Research Center, Dandae-ro 119 Dongnam-gu, Cheonan 31116, Korea
First published on 11th August 2025
As global energy demand rises, solid oxide fuel cells (SOFCs) are emerging as promising technologies for clean hydrogen energy conversion due to their high efficiency and fuel flexibility. However, cathode–electrolyte interfacial instability remains a major challenge, particularly in next-generation fuel cells such as metal–supported (MS) SOFCs operating at intermediate temperatures. Conventional ceria buffer layers, essential for preventing cathode–electrolyte reactions, suffer from poor densification, excessive thickness, and high sintering temperatures (above 1300 °C), limiting their industrial applicability. This study presents a novel low-temperature fabrication method using ultra-nano (∼3 nm) Gd-doped ceria particles, achieving a dense (∼99%) and ultra-thin (<400 nm) buffer layer at 900–1000 °C. This development eliminates Sr and Ba interdiffusion, significantly reducing polarization resistance (∼0.02 Ω cm2 at 700 °C) and enabling high power densities (∼1 W cm−2 at 700 °C in MS-SOFCs). The full cells maintained electrochemical stability over 200 h of constant-current operation and showed negligible degradation after 10 thermal cycles, confirming their operational durability. These findings directly impact energy science and technology, providing a scalable, cost-effective solution for enhancing SOFC efficiency. This work supports global clean energy policies by enabling more durable, high-performance SOFCs, accelerating their commercialization for hydrogen infrastructure, grid stabilization, and industrial decarbonization.
Unlike the chemically stable LSM, LSCF and BSCF react with zirconia at high temperatures, forming insulating Sr–Zr–O and Ba–Zr–O phases at the cathode–electrolyte interface, which significantly increase the interfacial resistances. To mitigate this, a ceria-based buffer layer is typically inserted between the cathode and electrolyte, preventing these unwanted reactions.9,10 The primary function of this ceria layer is to prevent the undesirable chemical interactions between the cathode and electrolyte interface. Consequently, developing an effective ceria buffer layer has emerged as a crucial technology for achieving high-performance and high-efficiency SOFCs.
The ceria layer, positioned between the cathode and solid electrolyte in SOFCs, essentially serves as an additional solid electrolyte layer. Therefore, it must be dense, thin, and chemically stable at the cathode–electrolyte interface. A dense layer is preferred because it enhances oxygen-ion conductivity and effectively blocks the diffusion of Sr and Ba species from the cathode to the zirconia electrolyte. A thinner layer is advantageous as it reduces ohmic resistance, thereby improving overall performance. Moreover, forming the ceria layer at lower temperatures can help suppress chemical reactions with the zirconia electrolyte. A review of numerous studies indicates ongoing efforts to achieve these objectives.
Fig. 1a illustrates the evolution of ceria buffer layer densities in SOFC research, showing that most reported relative densities remain below 95%, indicating persistent challenges in achieving full densification. This limitation stems from manufacturing constraints, particularly in wet-processing techniques.11–70 Currently, wet processing for ceria buffer layers follows two main approaches. The first involves coating a ceria slurry onto a rigid, pre-sintered YSZ electrolyte, using methods such as spray coating, dip coating, spin coating, or screen printing, followed by high-temperature sintering (above 1200 °C). However, despite high-temperature treatment, the buffer layer often remains porous due to the minimal in-plane sintering shrinkage of the rigid electrolyte.
Notably, several recent studies have demonstrated the fabrication of dense ceria-based layers via gelatin- or hydrogel-assisted solution processing.68–71 These polymer-mediated approaches promote in situ crystallization of metal precursors within structured organic matrices, offering an alternative to conventional nanoparticle-based wet-coating techniques. However, despite enabling uniform film formation from ionic precursors, gelatin- and hydrogel-assisted methods still require high-temperature sintering (>1200 °C).
The second approach involves co-firing the anode, electrolyte, and buffer layer at high temperatures (typically above 1300 °C), enabling simultaneous densification. However, differential shrinkage between the electrolyte and buffer layer can cause delamination, and interdiffusion at such high temperatures leads to the formation of Zr–Ce–Y–Gd–O phases, which degrade the ionic conductivity of both the electrolyte and the buffer layer.63
In addition to densification, achieving a thin ceria barrier layer remains challenging. As shown in Fig. 1b, recent research has focused on achieving thinner ceria layers to minimize ohmic resistance.12–71 However, conventional slurry-based methods struggle to fabricate buffer layers below 1 μm. Sub-micron thicknesses have been achieved, but primarily through costly pulsed laser deposition (PLD) and other physical vapor deposition (PVD) techniques.
Lowering the sintering temperature is equally critical and essential to minimize chemical interactions with the electrolyte and prevent undesirable phase formation. Fig. 1c shows that wet-coating methods have yet to achieve full densification below 1000 °C. Most reported studies require sintering above 1200 °C due to the poor sinterability of conventional ceria powders, which typically require above 1300 °C for densification.18 While physical deposition (PD) methods achieved dense and thin ceria layers at lower temperatures,64 they remain cost-prohibitive for industrial applications. Some SOFC manufacturers (Elcogen (Estonia), Samsung (Korea)) rely on wet processing (slurry-based tape casting, high-temperature sintering) for cell fabrication. However, achieving a dense, thin ceria buffer layer at low temperatures remains a key challenge.72,73 Therefore, overcoming this limitation would be a crucial technological breakthrough for the commercialization of SOFCs, particularly of MS-SOFCs.
Low-temperature processing is particularly crucial for metal–supported SOFCs (MS-SOFCs), which offer robust mechanical durability but require a reducing atmosphere to prevent metal–support oxidation. Unlike ceramic-supported SOFCs, where the entire stack is processed in air, MS-SOFCs present fabrication challenges: while cathodes (LSCF, BSCF) and ceria buffer layers require oxidizing conditions, the metal support must remain in a reducing atmosphere. Approaches to address this issue include low-temperature deposition methods (e.g., thermal spray coating) to form dense layers without high-temperature treatment or direct assembly, where the cathode and buffer layer are applied at room temperature and integrated directly into the electrochemical test setup.74,75 For instance, Choi et al. fabricated MS-SOFC half-cells by sintering the metal support, anode, and electrolyte at ∼1300 °C in a hydrogen atmosphere, followed by room-temperature coating of the cathode and buffer layer.76,77 During testing, the anode and metal support remained in a reducing atmosphere while the cathode was exposed to an oxidizing atmosphere, demonstrating the importance of buffer layer densification below 1000 °C.39,78
This study presents a scalable spin-coating approach using ultra-nano GDC particles to fabricate dense and thin buffer layers at 900–1000 °C. The approach enables high densification at significantly lower temperatures, suppresses Sr and Ba interdiffusion, and eliminates insulating phase formation. The resulting buffer layer minimizes ohmic resistance and is compatible with MS-SOFC fabrication, removing the need for additional high-temperature treatment. By bridging the gap between wet processing and high-performance PD techniques, this method provides a cost-effective, industrially viable solution for next-generation SOFCs and MS-SOFCs.
A notable feature of the synthesized nano GDC is that it has a mixed valence state of Ce4+ and Ce3+ ions, unlike conventional ceria.94 As shown in Fig. 2d, XPS analysis revealed a Ce4+ to Ce3+ ratio of 59:
41, indicating a high concentration of point defects within the ceria structure. The presence of Ce3+ is confirmed by STEM analysis. As seen in Fig. 2a, the interplanar distances calculated from the diffraction pattern for the (111) and (200) planes were ∼0.29 nm and ∼0.33 nm, respectively. These values deviate from those of conventional ceria (∼0.31 nm and ∼0.27 nm for the distances of two planes in CeO2, respectively), indicating that the amount of Ce3+ exists in the nano-ceria (note that Ce3+ (1.14 Å) has a larger ionic radius than Ce4+ (0.97 Å)).95,96
Further, this nano-GDC colloid was used to form buffer layers on the YSZ electrolyte. The nano-colloid was spin-coated multiple times onto a pre-sintered YSZ substrate and heat-treated at various temperatures (from 800 °C to 1200 °C, in 100 °C increments). These samples are designated as nGDC_firing temperature. Fig. 3a–f shows the microstructure of the GDC buffer layer formed with the nano colloid at different temperatures. As observed, significant sintering occurred at low temperatures. Even at 800 °C heat-treated cell (nGDC_800), noticeable particle growth and densification of the buffer layer were observed, confirming the nano-ceria sinter well, but its compatibility with the YSZ solid electrolyte at this firing temperature was insufficient. The best microstructure of the GDC buffer layer was achieved at nGDC_900 and nGDC_1000. It is observed that they exhibited denser GDC layers with better compatibility. The film thickness was below 400 nm. An optimal buffer layer structure with more than 95% density and a thickness below 1 μm was achieved. At higher sintering temperatures (nGDC_1100 and nGDC_1200), the buffer layers became even denser. However, partial delamination occurred due to the over-sintering of the layers. This trend was corroborated by top-view SEM images (Fig. S4), which showed a uniform and continuous surface morphology for nGDC_900 and nGDC_1000, while surface disruption and island-like features were observed from 1100 °C and above, indicating excessive grain growth.
Successful sintering at such a low temperature was probably due to the high surface energy of the nanoparticles. Ceria, known for its non-sinterability, does not sinter at such low temperatures without any sintering agent and special sintering techniques (see Fig. 3f). In addition, other information (density, thickness, and phase) for the buffer layer formed at low temperatures was provided in Fig. S2 and S3. The ceria buffer layer fabricated at optimal temperatures effectively prevented the diffusion of Sr and Ba species into the zirconia electrolyte. In this study, the cathode, consisting of a 7:
3 mixture of commercial BSCF and GDC powders, was screen-printed onto the buffer layer, which was pre-fired at varying temperatures (800–1200 °C) and subsequently fired at 900 °C. Symmetric cells were fabricated with the configuration BSCF-GDC|Buffer layer|YSZ|Buffer layer|BSCF-GDC, denoted as nGDC_temp_sym. For comparison, a reference sample without a ceria buffer layer (No_nGDC_sym) was also prepared. Although BSCF itself exhibits high oxygen-ion conductivity, GDC was intentionally added to the cathode to enhance ionic percolation and increase triple-phase boundary density. This composite design facilitates faster oxygen reduction kinetics and also moderates the thermal expansion coefficient of BSCF, improving mechanical compatibility with the YSZ electrolyte and GDC buffer layer.
Fig. 4 shows the elemental distribution of Sr and Ba in the vicinity of the cathode and the electrolyte interface. The results showed that Sr and Ba were detected in the zirconia electrolyte region of the No_nGDC_sym cell (Fig. 4a), confirming their strong diffusion into YSZ. In nGDC_800_sym (Fig. 4b), Sr and Ba were still detected in the zirconia region, likely due to the insufficient densification and compatibility of the buffer layer with the electrolyte. On the other hand, as observed in Fig. 4c, Sr and Ba diffusion in nGDC_900_sym was significantly reduced. In nGDC_1000_sym (Fig. 4d), diffusion into the zirconia electrolyte was prevented, demonstrating the effective blocking of the dense GDC layer. Although nGDC_1100_sym and nGDC_1200_sym also effectively suppressed Sr and Ba diffusion, gaps and delamination were observed at the GDC–YSZ interface, which may lead to high ohmic resistance (see Fig. 4e and f). To further verify the diffusion behavior of volatile species, EDS line profile analysis was conducted. Fig. 4g compares the EDS line scans of key elements in No_nGDC_sym and nGDC_1000_sym. As shown, in the zirconia electrolyte region of nGDC_1000_sym, Sr and Ba species were barely detected, whereas they were clearly present in No_nGDC_sym. The 1D EDS line profile results align with the 2D elemental mapping, further validating the findings.
Another notable observation from the EDS line profile analysis was the limited interdiffusion of Ce and Zr at the ceria–zirconia interface, which measured approximately 200 nm in thickness (defined as the distance from the 80% maximum intensity point of Zr to the 20% intensity point, as shown in Fig. 4g). The weak chemical interaction at the ceria–zirconia interface is advantageous as it helps mitigate oxygen-ion conductivity losses and reduces ohmic losses in SOFCs. On the other hand, conventional ceria buffer layers are typically heat-treated above 1200 °C, where extensive interdiffusion between ceria and zirconia leads to the formation of undesired solid solution phases, potentially compromising overall performance.97,98
Based on the density, thickness, and interfacial reaction region of the buffer layers discussed so far, the optimal layer structure, as outlined in the research objectives, was successfully achieved using nano GDC particles. Indeed, the effectiveness of this excellent buffer layer was verified through an electrochemical study of symmetric cells with a high-performance cathode. Fig. 5 shows the EIS result (Nyquist plots based on area-specific resistance (ASR)) of two symmetric cells, with and without the ceria buffer layer (nGDC_1000_sym and No_nGDC_sym). As shown in Fig. 5(a and b), the impedance patterns of the two cells differ significantly in both size and shape. Firstly, the starting points of the two samples (high-frequency region) show notable differences, indicating significant variations in ohmic resistance (Rohm). nGDC_1000_sym exhibits a much lower Rohm (Fig. 5b provides a magnified view of the yellow dashed circle in Fig. 5a, with the difference in Rohm values shown in Fig. 5c). This reduction is primarily attributed to the dense and thin buffer layer, which prevents the formation of Sr–Zr–O and Ba–Zr–O insulating phases between the cathode and the zirconia electrolyte (as discussed in Fig. 3 and 4). Interestingly, the conductivity calculated from Rohm for nGDC_1000_sym closely matched the theoretically estimated bulk YSZ value. For instance, the oxygen-ion conductivity of YSZ at 700 °C was ∼0.01 S cm−1, aligning well with reported values.99 This suggests that additional ohmic losses from the GDC layer and the GDC–YSZ interfacial phase are negligible, demonstrating that the buffer layer is optimally dense, thin, and minimally reactive. The activation energy (∼0.90 eV) for Rohm in nGDC_1000_sym also closely matches the bulk YSZ activation energy (∼0.88 eV),100 further confirming the minimal impact of the buffer layer on ionic conductivity.
The polarization resistance (Rpol), represented by the size of the depressed impedance pattern, followed a similar trend to Rohm in both symmetric cells. As shown in Fig. 5a and b, Rpol in nGDC_1000_sym was significantly lower than that in No_nGDC_sym. This improvement is attributed to enhanced electrochemical reactions at the electrode interface due to the dense GDC buffer layer, which prevents the formation of insulating phases. These insulating phases may hinder the cathodic reaction kinetics determined by elementary reactions, such as oxygen-ion incorporation, charge transfer, and gas diffusion, as well as lead to ohmic resistance loss.
To further understand the effect of cathodic elementary reactions on Rpol, a distribution of relaxation times (DRT) analysis was conducted. DRT analysis provides a more detailed breakdown of the frequency-dependent resistance components. The inset of Fig. 5a and b show the DRT results. As analyzed, the patterns can be divided into three distinct regions: high-frequency region (RHF), middle-frequency region (RMF), and low-frequency region (RLF).101 Here, Rx represents the resistance of each region (note Rpol = RHF + RMF + RLF). In terms of reaction kinetics, RHF, RMF, and RLF correspond to oxygen-ion incorporation/surface-ion diffusion, charge transfer, and gas diffusion reactions, respectively. This has been previously reported for SOFC studies and is also confirmed by the study of oxygen partial pressure (Po2) (see Fig. S5).102,103
All resistances analyzed for the two cells were compared in Fig. 5c, along with the differences (ΔASR) between No_nGDC_sym and nGDC_1000_sym. For Rpol, the No_nGDC_sym exhibited high RHF and RMF, indicating slower oxygen-ion incorporation/surface-ion diffusion, and charge transfer kinetics. Notably, RHF was the highest among RHF, RMF, and RLF. On the other hand, nGDC_1000_sym showed low values for all resistances, indicating faster kinetics in the cathode. The ΔASR values clearly confirm the enhancement of each kinetic process. In particular, the highest ΔRHF was observed, showing that the oxygen-ion incorporation and surface-ion diffusion, which are associated with RHF, are significantly improved in nGDC_1000_sym. This observation is reasonable, as the dense ceria buffer layer in contact with the cathode facilitates oxygen-ion incorporation and surface-ion diffusion due to its higher ionic conductivity than zirconia.104 Additionally, it is found that ΔRMF and ΔRLF are also affected by the presence of the buffer layer, indicating that each elementary step in the cathode reactions are interconnected. From this analysis, it is concluded that the ceria buffer layer significantly influences the cathode performance, highlighting its crucial role in maximizing the efficiency of SOFC cathodes.
In Fig. 6, Rpol and resistance components (RHF, RMF, RLF) of the samples with the buffer layer fired at different temperatures (nGDC_temp_sym) are shown. As previously shown, the buffer layers formed at 900 °C and 1000 °C exhibited optimal structures, resulting in low Rpol values. nGDC_800_sym, nGDC_1100_sym, and nGDC_1200_sym exhibited higher Rpol due to insufficient density, compatibility, and delamination issues (see Fig. 3). It is supported by the high R_HF values associated with oxygen incorporation in the cathode (Fig. 6b). These results further highlight the critical role of buffer layer density and interfacial compatibility with zirconia in optimizing cathode performance (other information such as DRT analysis, ASR, and the activation energy of ASR for all samples were provided in Fig. S6 and S7).
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Fig. 6 (a) Total polarization resistance (Rpol) and (b) each component resistance (RHF, RMF, RLF) values according to DRT analysis of symmetric cells with the buffer layer at 700 °C. |
To evaluate the electrochemical performance of the nGDC_900_sym and nGDC_1000_sym, optimal buffer layer cells, their Rpols were compared with previously reported results with ceria buffer layers (Fig. 7a).16–64 While SOFC cathode performance depends on cathode composition and microstructure, this comparison provides valuable insights into the quality and effectiveness of the nano-GDC buffer layer.105 Before comparing our results, the comparison figure reveals that SOFCs with ceria buffer layers fabricated via PD (dry processing) generally exhibit lower Rpol than those formed using wet processing techniques.17–64 This confirms that buffer layer quality significantly influences cathode performance, as PD techniques typically produce dense, thin, and uniform buffer layers, leading to improved electrochemical properties. Notably, despite being fabricated using a wet processing method in this study, both the nGDC_900_sym and nGDC_1000_sym demonstrate superior electrochemical performance, even outperforming some SOFCs with PD-based buffer layers. Furthermore, their performance is comparable to high-performance SOFCs reported by Z. Shao's group in Nature, where samarium-doped ceria (SDC) was used as the solid electrolyte instead of YSZ.93 From this comparison, it is revealed that the film quality of the buffer layer of the two cells is excellent, demonstrating that a well-optimized wet processing approach can achieve performance levels comparable to advanced PD techniques.
Lastly, a full cell study on MS-SOFC with a ceria buffer layer was conducted. As previously mentioned, low-temperature processing (below 1000 °C) for the ceria buffer layer is crucial in MS-SOFCs due to the oxidation-reduction issues of metals. The MS-SOFC was fabricated with the following configuration: BSCF + GDC(cathode)|nGDC(buffer layer)|YSZ (electrolyte)|Ni-YSZ (anode)|YSZ-Crofer22 (contact layer)|stainless steel (metal support), as shown in the inset of Fig. 7b. All layers, from the metal support to the electrolyte, were fabricated using slurry-based tape casting, lamination, and co-sintering in a reducing atmosphere. The nGDC buffer layer was subsequently spin-coated onto the dense YSZ electrolyte and dried. The cathode was screen-printed onto the buffer layer and then directly loaded into the SOFC test jig without additional heat treatment for the performance test. The highest temperature applied to the buffer layer and the cathode during the SOFC sealing process was 900 °C (it is expected that the ceria buffer layer was well densified, as confirmed in the previous section (Fig. 3 and 4)).
The obtained current (I)–voltage (V) curves of the lab-fabricated MS-SOFC are shown in Fig. 7b. Remarkably high performance was achieved despite the fact that the cell was a stainless-steel-based MS-SOFC, and the cathode and buffer layer were not thermally treated before cell loading. Note that it is difficult to achieve high power density in stainless-steel-based MS-SOFCs due to resistances originating from other layers, such as the metal support, contact layer, anode, and their interfaces.106–108 For instance, a power density of ∼1 W cm−2 was achieved at 700 °C (corresponding impedance results are provided in Fig. S8). Such high performance indicates that the nGDC buffer layer effectively suppressed the formation of insulating phases and contributed to low ohmic and polarization resistances in the MS-SOFC.
To contextualize the performance further, a comparative analysis of recent STS-supported SOFCs is presented in Fig. 7c.39,74–76,109–131 Our result (highlighted in red) clearly resides on the upper boundary of reported values, despite being based on a wet-processed buffer layer fabricated without high-temperature post-sintering. This level of performance is comparable to the state-of-the-art demonstrated by M. C. Tucker et al., who employed symmetric stainless-steel-based cells with nanoparticle-based electrodes.128–131 However, their configuration required stainless-steel substrates on both sides, which resulted in oxidation-induced degradation of the air-side support and agglomeration of nanoparticle cathode materials during operation. In contrast, our approach decouples cathode sintering from stack assembly and leverages a chemically stable GDC buffer layer to reinforce the cathode/electrolyte interface, thereby mitigating these issues and enabling a more scalable and structurally robust MS-SOFC platform.
The long-term reliability and thermal robustness of the cell were also verified through 200-hour continuous operation under 0.7 A cm−2 at 700 °C, and 10 thermal cycles between 700 °C and 300 °C (Fig. 7d and e). These tests revealed minimal voltage degradation and stable electrochemical impedance, confirming the durability of the integrated cell. Post-mortem SEM and EDS analyses (Fig. S9–S11) further validated the structural integrity of the buffer/electrolyte interface, showing no delamination or detectable cation interdiffusion.
Thus, the results of this study demonstrate that the buffer layer formed by ultra-nano GDC resolves the buffer layer issues of conventional SOFCs and addresses a key limitation in MS-SOFCs. Furthermore, despite being a wet-processed approach, the nGDC buffer layer delivered performance levels comparable to or exceeding those of PD-based methods, establishing its practical applicability for high-efficiency MS-SOFCs.
The Supplementary Information includes detailed experimental procedures and additional materials characterizations. See DOI: https://doi.org/10.1039/d5ta02799c.
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